View 74AC163_104461.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
74AC163
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
s
s
s
s
s
s
s
s
s
HIGH SPEED: fMAX =200 MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) 50 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 163 IMPROVED LATCH-UP IMMUNITY
B M (Plastic Package) (Micro Package) ORDER CODES : 74AC163B 74AC163M reset, parallel load, count-up and hold. Four control inputs, Master Reset (CLEAR), Parallel Enable Input (LOAD), Count Enable Input (PE) and Count Enable Carry Input (TE), determine the mode of operation as shown in the Truth Table. A LOW signal on CLEAR overrides counting and parallel loading and allows all output to go LOW on the next rising edge of CLOCK. A LOW signal on LOAD overrides counting and allows information on Parallel Data Qn inputs to be loaded into the flip-flops on the next rising edge of CLOCK. With LOAD and CLEAR, PE and TE permit counting when both are HIGH. Conversely, a LOW signal on either PE and TE inhibits counting. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
DESCRIPTION The AC163 is a high-speed CMOS SYNCRONOUS PRESETTABLE COUNTERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power applications mantaining high speed operation similar to eqivalent Bipolar Schottky TTL. It is a 4 bit binary counter with Synchronous Clear. The circuits have four fundamental modes of operation, in order of preference: synchronous PIN CONNECTION AND IEC LOGIC SYMBOLS
December 1998
1/12
74AC163
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1 2 3, 4, 5, 6 7 10 9 14, 13, 12, 11 10 8 16 SYMBOL CLEAR CLOCK A, B, C, D NAME AND FUNCT ION Master Reset Clock Input (LOW-to-HIGH, Edge- Triggered) Data Inputs
ENABLE P Count Enable Input ENABLE T Count Enable Carry Input LOAD QA to QD Parallel Enable Input Flip-Flop Outpus
ENABLE T Count Enable Carry Input GND VCC Ground (0V) Positive Supply Voltage
TRUTH TABLE
INPUT S CLR L H H H H X
NOTE:
O UT PUT S TE X X L X H X CK QA L A QB L B QC L C QD L D
FUNCT ION RESET TO "0" PRESET DATA NO COUNT NO COUNT COUNT NO COUNT
LD X L H H H X
PE X X X L H X
NO CHANGE NO CHANGE COUNT UP NO CHANGE
X:Don't Care A,B, C,D: Logic level of data input CARRY=TE * QA * QB * QC * QD
LOGIC DIAGRAMS
2/12
74AC163
TIMING CHART
3/12
74AC163
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 50 300 -65 to +150 300 Unit V V V mA mA mA mA
o o
ICC or IGND DC VCC or Ground Current
C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature: Input Rise and Fall Time VCC = 3.0, 4.5 or 5.5 V(note 1) Parameter Valu e 2 to 6 0 to VCC 0 to VCC -40 to +85 8 Unit V V V
o
C
ns/V
1) VIN from 30% to70%of VCC
4/12
74AC163
DC SPECIFICATIONS
Symb ol Parameter V CC (V) VIH High Level Input Voltage 3.0 4.5 5.5 VIL Low Level Input Voltage 3.0 4.5 5.5 VOH High Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 VOL Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 II ICC IOLD IOHD Input Leakage Current Quiescent Supply Current Dynamic Output Current (note 1, 2) 5.5 5.5 5.5 VI = V IH or V IL
(* )
Test Co nditions Min. VO = 0.1 V or VCC - 0.1 V VO = 0.1 V or VCC - 0.1 V I O =-50 A VI = V IH or V IL
(* )
Valu e T A = 25 oC T yp. 1.5 2.25 2.75 1.5 2.25 2.75 2.9 4.4 5.4 2.56 3.86 4.86 0.002 0.001 0.001 0.1 0.1 0.1 0.36 0.36 0.36 0.1 4 2.99 4.49 5.49 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1 40 75 -75 Max. 2.1 3.15 3.85 -40 to 85 o C Min. 2.1 3.15 3.85 0.9 1.35 1.65 Max.
Un it
V
V
IO=-50 A IO=-50 A IO=-12 mA IO=-24 mA IO=-24 mA IO=50 A IO=50 A IO=50 A IO=12 mA IO=24 mA IO=24 mA
V
V
VI = VCC or GND VI = VCC or GND VOLD = 1.65 V max VOHD = 3.85 V min
A A mA mA
1) Maximum test duration 2ms, one output loaded attime 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 . (*) All outputs loaded.
5/12
74AC163
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 , Input tr = tf =3 ns)
Symb ol Parameter V CC (V) tPLH tPHL tPLH tPHL tPLH tPHL tw tw ts th ts th ts th ts th fMAX Propagation Delay Time CK to Q Propagation Delay Time CK to CARRY OUT Propagation Delay Time TE to CARRY OUT CK pulse Width, (Count) HIGH or LOW CK pulse Width (Load) HIGH or LOW Setup Time HIGH or LOW (INPUT to CLOCK) Hold Time HIGH or LOW (INPUT to CK) Setup Time HIGH or LOW (CLEAR to CK) Hold Time HIGH or LOW (CLEAR to CK) Setup Time HIGH or LOW (LOAD to CK) Hold Time HIGH or LOW (LOAD to CK) Setup Time HIGH or LOW (PE or TE to CK) Hold Time HIGH or LOW (PE or TE to CK) Maximum Clock Frequency 3.3(*) 5.0(**) 3.3(*) 5.0(**) 3.3(*) 5.0(**) 3.3(*) 5.0
(**)
T est Con ditio n
Valu e T A = 25 oC -40 to 85 o C Min. T yp. Max. Min. Max. 7.0 12.0 13.0 5.0 8.0 6.0 5.5 4.0 2.0 2.0 2.0 2.0 2.0 1.5 -1.5 -1.0 1.0 1.0 -0.5 -0.3 3.0 2.5 -2.5 -1.5 3.0 2.0 -2.0 -1.5 70 110 200 200 9.0 14.0 10.5 9.5 6.5 4.5 4.0 3.0 2.5 4.0 3.0 -0.5 0.5 3.0 3.5 0.5 0.5 5.0 6.0 -1.0 0 6.0 4.0 -0.5 0 60 95 9.5 15.0 11.5 11.0 7.5 7.5 4.5 3.5 3.0 5.0 4.0 0 1.0 4.0 4.5 1.0 1.0 8.0 7.0 -0.5 0.5 7.0 5.0 0 0.5
Un it
ns ns ns ns ns ns ns ns ns ns ns ns ns MHz
3.3(*) 5.0(**) 3.3(*) 5.0(**) 3.3(*) 5.0(**) 3.3(*) 5.0(**) 3.3(*) 5.0(**) 3.3(*) 5.0(**) 3.3(*) 5.0(**) 3.3(*) 5.0
(**)
3.3(*) 5.0(**) 3.3(*) 5.0(**)
(*) Voltage range is 3.3V 0.3V (**) Voltage range is 5V 0.5V
CAPACITIVE CHARACTERISTICS
Symb ol Parameter V CC (V) C IN CPD Input Capacitance Power Dissipation Capacitance (note 1) 5.0 5.0 fIN = 10 MHz Test Co nditions Min. T yp. 4.5 35 Valu e T A = 25 oC Max. -40 to 85 o C Min. Max. pF pF Un it
1) CPD isdefined as the value of the IC'sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD * VCC * fIN + ICC/n(per circuit)
6/12
74AC163
TEST CIRCUIT
CL = 50 pF or equivalent (includes jigand probe capacitance) RL = R1 = 500 orequivalent RT = ZOUT of pulse generator (typically 50)
WAVEFORM 1: PROPAGATION DELAYS, COUNT MODE (f=1MHz; 50% duty cycle)
7/12
74AC163
WAVEFORM 2: PROPAGATION DELAYS CLEAR MODE (f=1MHz; 50% duty cycle)
WAVEFORM 3: PROPAGATION DELAYS PRESET MODE (f=1MHz; 50% duty cycle)
8/12
74AC163
WAVEFORM 4: PROPAGATION DELAYS COUNTEABLE MODE (f=1MHz; 50% duty cycle)
WAVEFORM 5: PROPAGATION DELAYS CASCADE MODE (f=1MHz; 50% duty cycle)
9/12
74AC163
Plastic DIP-16 (0.25) MECHANICAL DATA
mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX.
DIM.
P001C
10/12
74AC163
SO-16 MECHANICAL DATA
DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8 (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45 (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010
P013H
11/12
74AC163
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com .
12/12

▲Up To Search▲

Price & Availability of 74AC163

	To Download 74AC163 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .